Page 17 - DCAP104_EXPOSURE_TO_COMPUTER_DISCPLINES
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Exposure to Computer Disciplines
Notes Thus, both +0 and - 0 are same in 2’s complement notation. This is an added advantage in favour
of 2’s complement notation. The highest number, which can be accommodated in a register, also
depend on the type of representation. In general, in a 8 bit register 1 bit is used as sign, therefore,
rest 7 bits can be used for representing the value. The highest and the lowest number, which can
be represented, are:
For signed magnitude representation 27 - I to - (2j- I )
= 128- 1t0-(128- I)
= 127 t0-127
For signed 1’s complement 127 to - 127
But, for signed 2’s complement we can represent +I27 to –128. The –128 is represented in signed
2’s complement notation as 10000000.
Arithmetic Subtraction: The subtraction can be easily done using the 2’s complement by taking
the 2’s complement of the subtractend (inclusive of sign bit) and then adding the two numbers.
Signed 2’s complement provide very simple way for adding and subtracting two numbers.
thus, finally computer (including IBM PC) adopt signed 2’s coinpleinent notation. The reason
why signed 2’s complement is preferred over signed 1’s complement is because it has only one
representation for zero.
Overflow: An overflow is said to have occurred whcn the sum of two n cligits number occupies
n + 1 digits. This definition is valid for both binary as decimal digits. But what is the significance
of overflow for binary numbers since it is not a problem for the cases when we add two numbers?
Well the answer is in the limits of representation of numbers. Every computer employs a limit for
representing number e.g., in our examples we are using 8 bit registers for calculating the sum.
But what will happen if the sum of the two numbers can be accommodated in 9 bits? Where are
we going to store the 9th bit? The problem will be clearer by the following example.
Add the numbers 65 and 75 in 8 bit register in signed 2’s
complement notation.
65 0 1000001
75 0 1001011
140 1 0001100
The expected result is +140 but the binary sum is a negative number and is equal to - 1 16, which
obviously is a wrong result. This has occurred because of overflow.
How does the computer know that overflow has occurred?
If the carry into the sign bit is not equal to the carry out qf the sign bit then overflow must have
occurred.
For example,
Thus, overflow has occurred, i.e. the arithmetic results so calculated have exceeded the capacity
of the representation. This overflow also implies that the calculated results might be erroneous.
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