Page 15 - DCAP206_INTRODUCTION_TO_COMPUTER_ORGANIZATION_AND_ARCHITECTURE_DCAP502_COMPUTER_ORGANIZATION_AND_ARCHITECTURE

Computer Organization and Architecture/Introduction to Computer Organization and Architecture

Notes
Figure 1.6 depicts logic symbol and truth table of OR gate.
Figure 1.6: Logic Symbol and Truth Table of OR
Gate

Figure 1.7 depicts how OR gates are placed within an IC.

Figure 1.7: Internal Structure of IC 7432

In the figure, pin number 1, 2, 4, 5, 9, 10, 12, and 13 are the inputs to the OR gate, while 3, 6, 8, and
11 are the OR outputs. Pin number 7 is connected to the ground and pin number 14 is connected
to the power supply.
NOT Gate
In digital electronics, the NOT gate is also known as inverting buffer or a digital inverter element.
A NOT gate is basically a single input device. It has an output level that is often at logic level ‘1’.
However, it goes ‘LOW’ to a logic level ‘0’ whenever the single input is at logic level ‘1’. The
output from a NOT gate returns ’HIGH’ when its input is at logic level ’0’.
The Boolean expression of NOT gate is Q=A

8 LOVELY PROFESSIONAL UNIVERSITY