Page 173 - DCAP103_Principle of operating system

Principles of Operating Systems

Notes The free page queue is a list of page frames that are available for assignment
after a page fault. Some operating systems support page reclamation; if a
page fault occurs for a page that had been stolen and the page frame was
never reassigned, then the operating system avoids the necessity of reading
the page back in by assigning the unmodified page frame.

5.6 Segmentation

An important aspect of memory management that became unavoidable with paging is the
separation of the user’s view of memory and the actual physical memory. The user’s view
of memory is not the same as the actual physical memory. The user’s view is mapped onto
physical memory. The mapping allows differentiation between logical memory and physical
memory.

5.6.1 Segmentation with Paging

Both paging and segmentation have advantages and disadvantages. In fact, of the two most
popular microprocessors now being used, the Motorola 68000 line is designed based on a
flat-address space, whereas the Intel 80 × 86 and Pentium family are based on segmentation.
Both are merging memory models toward a mixture of paging and segmentation. We can
combine these two methods to improve on each. This combination is best illustrated by the
architecture of the Intel 386. The IBM OS/2 32-bit version is an operating system running
on top of the Intel 386 (and later) architecture. The Intel 386 uses segmentation with paging
for memory management. The maximum number of segments per process is 16 KB, and
each segment can be as large as 4 gigabytes. The page size is 4 KB. We shall not give a
complete description of the memory-management structure of the 386 in this text. Rather,
we shall present the major ideas. The logical-address space of a process is divided into
two partitions. The first partition consists of up to 8 KB segments that are private to that
process. The second partition consists of up to 8 KB segments that are shared among all the
processes. Information about the first partition is kept in the local descriptor table (LDT),
information about the second partition is kept in the global descriptor table (GDT). Each
entry in the LDT and GDT consists of 8 bytes, with detailed information about a particular
segment including the base location and length of that segment. The logical address is a
pair (selector, offset), where the selector is a 16-bit number:

Figure 5.20: 16-bit Number

s g p

13 1 2

in which s designates the segment number, g indicates whether the segment is in the GDT or
LDT, and p deals with protection. The offset is a 32-bit number specifying the location of the
byte (or word) within the segment in question. The machine has six segment registers, allowing
six segments to be addressed at any one time by a process. It has six 8-byte micro program
registers to hold the corresponding descriptors from either the LDT or GDT. This cache lets the
386 avoid having to read the descriptor from memory for every memory reference. The physical
address on the 386 is 32 bits long and is formed as follows.
The segment register points to the appropriate entry in the LDT or GDT. The base and limit
information about the segment in question are used to generate a linear address. First, the limit
is used to check for address validity. If the address is not valid, a memory fault is generated,

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