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Unit 3: Assembly Language Programming of 8085


            For example:                                                                          Notes

              Task            Opcode   Operand    Binary Code  Hex Code
              Transfer the    JMP      2085H      1100 0011    C3          First byte
              program sequence                    100001010    85          Second byte
              to the memory                       010 0000     20          Third byte
              location 2085H.

            This instruction would require three memory locations to store in memory.
            Three-byte instructions — opcode + data byte + data byte
            LXI rp, data16
            rp is one of the pairs of registers BC, DE, HL used as 16-bit registers. The two data
            bytes are 16-bit data in L H order of significance.
            rp <— data16

                  Example: LXI H,0520H coded as 21H 20H 50H in three bytes. This is also immediate

            addressing.
            LDA addr
            A <— (addr) Addr is a 16-bit address in L H order. Example: LDA 2134H coded as 3AH 34H 21H.
            This is also an example of direct addressing.
            3.4.5 Opcode Format
            In the design of the 8085 microprocessor chip, all operations, registers and status flags are identified
            with a specific code. First understand how an instruction is designed into the microprocessor,
            which will be useful in reading a user’s manual. In user manual, the operation codes are specified
            in binary format and 8-bits are divided into various groups. All internal registers are identified
            as follows:

                               Table 3.7: Internal Registers and Their Codes

                Code                               Register pairs

                 00                                BC
                 01                                DE
                 10                                HL
                 11                                AF or SP


             Code                                  Registers
             000                                   B
             001                                   C
             010                                   D
             011                                   E
             100                                   H
             101                                   L
             111                                   A
             110                                   Reserved for memory related operation



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