Page 161 - DCAP103_Principle of operating system

Principles of Operating Systems

Notes with main memory are also prevalent with backing store, except that access is much slower, so
compaction is impossible. Because of its advantages over the previous methods, paging in its
various forms is commonly used in most operating systems.

Traditionally, support for paging has been handled by hardware. However, recent designs have
implemented paging by closely integrating the hardware and operating system, especially on
64-bit microprocessors.

Figure 5.4: Paging Hardware

f

Logical Physical
address address f0000 ... 0000

CPU p d I d

f1111 ... 1111

P

f

Physical
memory
Page table

5.5.1 Basic Method

Physical memory is broken into fixed-sized blocks called frames. Logical memory is also broken
into blocks of the same size called pages. When a process is to be executed, its pages are loaded
into any available memory frames from the backing store. The backing store is divided into
fixed-sized blocks that are of the same size as the memory frames. Every address generated by
the CPU is divided into two parts: a page number (p) and a page offset (d). The page number
is used as an index into a page table. The page table contains the base address of each page in
physical memory. This base address is combined with the page offset to define the physical
memory address that is sent to the memory unit. The page size (like the frame size) is defined
by the hardware. The size of a page is typically a power of 2, varying between 512 bytes and 16
MB per page, depending on the computer architecture. The selection of a power of 2 as a page
size makes the translation of a logical address into a page number and page offset particularly
easy. If the size of logical-address space is 2m, and a page size is 2n addressing units (bytes or
words), then the high-order rn—n bits of a logical address designate the page number, and the
n low-order bits designate the page offset. Thus, the logical address is as follows:

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