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Unit 5: Memory Management



                                                                                                  Notes
                                Figure 5.25: Steps in Handling a Page Fault





































               4.  We schedule a disk operation to read the desired page into the newly allocated frame.
               5.  When the disk read is complete, we modify the internal table kept with the process and
                 the page table to indicate that the page is now in memory.
               6.  We restart the instruction that was interrupted by the illegal address trap. The process
                 can now access the page as though it had always been in memory.
            It is important to realize that, because we save the state (registers, condition code, instruction
            counter) of the interrupted process when the page fault occurs, we can restart the process in
            exactly the same place and state, except that the desired page is now in memory and is accessible.
            In this way, we are able to execute a process, even though portions of it are not (yet) in memory.
            When the process tries to access locations that are not in memory, the hardware traps to the
            operating system (page fault). The operating system reads the desired page into memory and
            restarts the process as though the page had always been in memory. In the extreme case, we
            could start executing a process with no pages in memory. When the operating system sets the
            instruction pointer to the first instruction of the process, which is on a non-memory-resident
            page, the process immediately faults for the page. After this page is brought into memory, the
            process continues to execute, faulting as necessary until every page that it needs is in memory.
            At that point, it can execute with no more faults. This scheme is pure demand paging: Never
            bring a page into memory until it is required.
            Theoretically, some programs may access several new pages of memory with each instruction
            execution (one page for the instruction and many for data), possibly causing multiple page faults
            per instruction. This situation would result in unacceptable system performance. Fortunately,
            analysis of running processes shows that this behavior is exceedingly unlikely. Programs tend
            to have locality of reference which results in reasonable performance from demand paging. The
            hardware to support demand paging is the same as the hardware for paging and swapping.



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