Page 83 - DCAP108_DIGITAL_CIRCUITS_AND_LOGIC_DESIGNS

Digital Circuits and Logic Design Sandeep Kumar, Lovely Professional University

Notes Unit 5: Combinational Circuits

CONTENTS
Objectives
Introduction
5.1 Adder
5.1.1 Half Adder
5.1.2 Full Adder
5.2 Subtractor
5.2.1 Half Subtractor
5.2.2 Full Subtractor

5.3 Encoder
5.3.1 Binary Encoder
5.3.2 Priority Encoder
5.4 Decoder
5.5 Summary
5.6 Keywords
5.7 Review Questions

5.8 Further Reading

Objectives

After studying this unit, you will be able to:
• Explain working of adder
• Discuss subtractor
• Understand encoder
• Discuss decoder

Introduction

Combinational (combinatorial) circuits realize Boolean functions and deal with digitized signals,
usually denoted by 0s and 1s. The behaviour of a combinational circuit is memoryless; that is, given
a stimulus to the input of a combinational circuit, a response appears at the output after some
propagation delay, but the response is not stored or fed back. Simply put, the output depends solely
on its most recent input and is independent of the circuit’s past history. Design of a combinational
circuit begins with a behavioural specification and selection of the implementation technique.
These are then followed by simplification, hardware synthesis, and verification.

Combinational circuits can be specified via Boolean logic expressions, structural descriptions, or
truth tables. Various implementation techniques, using fixed and programmable components,
are outlined in the rest of this article. Combinational circuits implemented with fixed logic tend
to be more expensive in terms of design effort and hardware cost, but they are often both faster
and denser and consume less power. They are thus suitable for high-speed circuits and/or high-
volume production. Implementations that use memory devices or programmable logic circuits,

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