Page 156 - DCAP313_LAB_ON_COMPUTER_GRAPHICS

Lab on Computer Graphics

Notes Self Assessment Questions
1. Translation is a simple transformation that is calculated directly from the conversion
matrix for ………………., one translate of the other.
( a) one frames (b) two frames

( c) three frames (d) None of these
2. Transformation is classified:
( a) Matrix (b) Frame

( c) Scaling (d) None of these
3. 3-Dimensional transformation it has three axes Tx, Ty, Tz depending upon their coordinate.
( a) True (b) False
4. A translation can also be represented by a pair of numbers…………………..

( a) t = (tx, ty) (b) t = (x, y)
( c) t = (x + y) (d) None of these

5. Where Tx is the change in the y-coordinate.
( a) True (b) False

9.4 Translating Addresses

Things are really bad than just physical and virtual addresses. Though, on many setups, there
are really three different ways of gazing at memory addresses, and here we actually want the
third, the so-called “bus address”.

Essentially, the three ways of addressing memory are:
• CPU untranslated. This is the “physical” address, ie physical address 0 is what the CPU
sees when it drives zeroes on the memory bus.
• CPU translated address. This is the “virtual” address, and is completely internal to the
CPU itself with the CPU doing the appropriate translations into “CPU untranslated”.
• Bus address. This is the address of memory as seen by other devices, not the CPU. Now,
in theory there could be many different bus addresses, with each device seeing memory in
some device-specific way, but happily most hardware designers are not actually actively
trying to make things any more complex than necessary, so you can assume that all external
hardware sees the memory the same way.
Now, on normal PC’s, the bus address is exactly the same as the physical address and things
are very simple indeed. However, they are that simple because the memory and the devices
share the same address space, and that is not generally necessarily true on other PCI/ISA setups.
Translation of Virtual Addresses
Computer graphics processor able of reading from, and writing to, virtual memory. The invention
provides a graphics processing unit which includes, among other things, a graphic processor in
the form of an address generator which retrieves data from memory locations, and writes data to
memory locations. The address generator retrieves data from memory locations memory access
request directly to a memory control unit, which retrieves the contents of the memory location.
Prior to issuing the request, the address generator sends the address to a virtual translation
unit, which translates the virtual address to a physical address. The virtual translation/FIFO

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