Page 139 - DCAP108_DIGITAL_CIRCUITS_AND_LOGIC_DESIGNS

Digital Circuits and Logic Design

Notes Tunneling the electrons of the floating gate towards the oxide layer separating the floating gate
and the control gate is still the method of changing a bit’s value from 1 to 0. To erase EEPROM
programming, the electron barrier still has to be overcome by the application of enough
programming voltage.
8.5.2 EEPROM Limitations

While the EEPROM can be reprogrammed, the number of times it can be altered, is limited. This
is the main reason why EEPROM chips are popular for storing only configuration data such as the
computer’s BIOS code which does not require frequent reprogramming. The oxide insulating layer
can be damaged by frequent rewrite. Modern-day EEPROMs can be rewritten up to a million times.

Prepare a process structure of EEPROM.

Self Assessment
Multiple choice questions:

1. RAM chips plugged into special sockets on the motherboard are known as ................
(a) SIMMs (b) SINNs
(c) SIMNs (d) None of these
2. ROM with 12 input variables would require .............. AND gates.
(a) 212 (b) 210
(c) 222 (d) 22
3. ROM has a large number of fusible links ..............
(a) m × 2 (b) m × 2n

(c) m2 × 2n (d) m2 × 2
True or False:
4. EPROM chips are of four types.
(a) True (b) False

5. RAM is much faster to read from and write to than the other kinds of storage.
(a) True (b) False
6. Read only memory (ROM) is a volatile memory.
(a) True (b) False

8.6 Programmable Logic Array (PLA)

One way to design a combinational logic circuit is to get gates and connect them with wires. One
disadvantage with this way of designing circuits is its lack of portability. You can now get chips
called PLA (programmable logic arrays) and “program” them to implement Boolean functions.

Fortunately, a PLA is quite simple to learn, and produces nice neat circuits too.
A programmable logic array (PLA) is a large scale integrated programmable logic device which
is used for synthesizing combinational logic functions. It consists of a programmable AND gate

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