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Digital Circuits and Logic Design



                   Notes
                                    •  1949 – monostable as flip-flop: “... a flip-flop is a monostable multivibrator and the
                                      ordinary multivibrator is an astable multivibrator.”
                                   According to P. L. Lindley, a JPL engineer, the flip-flop types discussed below (RS, D, T, JK)
                                   were first discussed in a 1954 UCLA course on computer design by Montgomery Phister, and
                                   then appeared in his book Logical Design of Digital Computers. Lindley was at the time working
                                   at Hughes Aircraft under Dr. Eldred Nelson, who had coined the term JK for a flip-flop which
                                   changed states when both inputs were on. The other names were coined by Phister. They differ
                                   slightly from some of the definitions given below. Lindley explains that he heard the story of
                                   the JK flip-flop from Dr. Eldred Nelson, who is responsible for coining the term while working
                                   at Hughes Aircraft. Flip-flops in use at Hughes at the time were all of the type that came to
                                   be known as J-K. In designing a logical system, Dr. Nelson assigned letters to flip-flop inputs
                                   as follows: #1: A & B, #2: C & D, #3: E & F, #4: G & H, #5: J & K. Nelson used the notations
                                   “j-input” and “k-input” in a patent application filed in 1953.
                                   Questions:
                                    1.  What is importance of electronic flip-flop?

                                    2.  How many types of flip-flop?

                                 Self Assessment

                                 Multiple choice questions:
                                    6.  Sequential circuits with ....................... can cause the circuit to produce erroneous behaviour.
                                       (a)  unused states              (b)  states assignment
                                       (c)  state reduction            (d)  states hazard
                                    7.  The ..................... is constructed using all the states of the sequential circuit in question.

                                       (a)  state diagram              (b)  states assignment
                                       (c)  state reduction            (d)  states hazard
                                    8.  Combinational logic decodes the state into the ....................... signals.
                                       (a)  next-state                 (b)  input
                                       (c)  clock                      (d)  output

                                 True or False:
                                    9.  The K-map is the same as the combinational circuits K-map.

                                       (a)  True                       (b)  False
                                   10.  In particular, nearly all computers are not designed as clocked sequential systems.
                                       (a)  True                       (b)  False

                                 10.6 Summary

                                    •  Digital electronics is classified into combinational logic and sequential logic.
                                    •  A sequential circuit is specified by a time sequence of inputs, outputs, and internal states.
                                    •  Synchronization is achieved by a timing device called a clock pulse generator.
                                    •  A clock signal is a periodic square wave that indefinitely switches from 0 to 1 and from
                                      1 to 0 at fixed intervals.




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