Page 225 - DCAP108_DIGITAL_CIRCUITS_AND_LOGIC_DESIGNS

Digital Circuits and Logic Design

Notes 12.5: Find the output voltage from a 5-bit ladder that has a digital input of 11010.

Assume that 0 = 0V and l = +l0V.
Solution:
By eq. (11.3):
*
02 + * 0 10 2 + * 1 0 2 + * 2 102 + * 3 10 2 4
V =
A 5
2
*
(
8
10 2 ++ 16) 10 26
= = = +8.125 V
32 32
This solution can be checked by adding the individual bit contributions calculated in Example 12.4.
Notice that Eq. (12.3) is very similar to Eq. (12.1), which was developed for the resistive divider.
They are, in fact, identical with the exception of the denominators. This is a subtle but very
important difference. Recall that the full-scale voltage for the resistive divider is equal to the
voltage level of the digital input 1. On the other hand, examination of Eq. (12.2) reveals that the
full-scale voltage for the ladder is given by
1 1 1 1 1
V = + + + + ........ +
A 2 4 8 16 2 n
The terms inside the brackets form a geometric series whose sum approaches 1, given a sufficient
number of terms. However, it never quite reaches 1. Therefore, the full-scale output voltage of
the ladder approaches V in the limit, but never quite reaches it.
12.6: What is the full-scale output voltage of the 5-bit ladder in Example 12.4?

Solution:
The full-scale voltage is simply the sum of the individual bit voltages. Thus
V = 5 + 2.5 + 1.25 + 0.625 + 0.3125 = +9.6875 V
To keep the ladder in perfect balance and to maintain symmetry, the output of the ladder should
be terminated in a resistance of 2R. This will result in a lowering of the output voltage, but if the
2R load is maintained constant, the output voltages will still be a properly weighted sum of the
binary input bits. If the load is varied, the output voltage will not be a properly weighted sum,
and care must be exercised to ensure that the load resistance is constant.
Terminating the output of the ladder with a load of 2R also ensures that the input resistance to
the ladder seen by each of the digital voltage sources is constant. With the ladder balanced in this
manner, the resistance looking into any branch from any node has a value of 2R. Thus the input
resistance seen by any input digital source is 3R. This is a definite advantage over the resistive
divider, since the digital voltage sources can now all be designed for the same load.
12.7: Suppose that the value of R for the 5-bit ladder described in Example

12.4 is 1000 W. Determine the current that each input digital voltage source must be capable of
supplying. Also determine the full-scale output voltage, assuming that the ladder is terminated
with a load resistance of 2000 W.
Solution:

The input resistance into the ladder seen by each of the digital sources is 3R = 3000 W. Thus,
for a voltage level of + 10 V, each source must be capable of supplying I = 10/(3 * 10 ) = 3⅓
3
mA (without the 2R load resistor, the resistance looking into the MSB terminal is actually 4R).
The no-load output voltage of the ladder has already been determined in Example 12.6. This
open-circuit output voltage along with the open-circuit output resistance can be used to form

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