Page 12 - DCAP210_INTRODUCTION__TO_MICROPROCESSORS

Introduction to Microprocessors
Notes
6 LOVELY PROFESSIONAL UNIVERSITY
(D) Microprocessor — CPU Chip (4004)
In the calculator application, each user key stroke caused thousands of CPU instructions to be
executed from ROM. We wrote many subroutines which operated on 16-digit numbers stored in
RAM.
Figure 1.6: Microprocessor — CPU Chip
As an example, a 10-byte loop for digit serial addition took about 80 µs/digit (similar speed as
IBM 1620 computer sold in 1960 for ` 100 000). In this add routine a CPU index register would
address each of the 16 digits stored in the RAM memory. The program would bring in one digit
at a time into the CPU’s accumulator register to do arithmetic. A Decrement and Jump instruction
was used to index to the next RAM location. One major difference, compared to most computers,
was the MCS-4’s separate program and data memories. Conventional computers ran programs
from RAM (core) memory. However, our application firmware needed to be permanently stored
in ROM. A major change was needed for subroutine linkage. Normally, as part of a minicomputer
subroutine call instruction execution (PDP-8, HP 2114) the calling program’s return address would
be saved at the top of the subroutine in RAM. Since MCS-4 routines were in ROM (can’t write
into it) we could not use this method. Instead. We used, a push down stack inside the CPU for
saving up to three return addresses. This was not a new idea. Stacks had been used in Burrough’s
computers and the IBM 1620, which Ted Hoff had programmed—we used our experience with
large-scale computers. Ultimately this limited depth of four levels (which was all we could squeeze
on to this small chip) was frustrating for programmers and succeeding generations went to eight
or more levels (8008, 4040, 8048). Today’s computers have stacks of many megabytes; but their
usage is very similar to their use in the 4004.
(E) Distributed Logic Architecture
The time division multiplexing of the 4-b bus, the on-chip dynamic RAM memories, and the
CPU’s address stack are the highlights of the MCS-4 architecture. However, there is another
interesting feature—distributed decoding of instructions. The ROM/RAM chips watched the
bus, and locally decoded port instructions, as they were sent from the ROM. This eliminated the
need for the CPU to have separate signal lines to the I/O ports, and also saved CPU logic. This is
not a feature used in conventional computers.
(F) MCS-4 Applications
The smallest system would contain two chips a CPU and a ROM. A typical calculator had 4
ROM’s and a RAM chip with five I/O ports, (20) wires for connecting peripheral devices. A fully
loaded system could have 16 ROM and 16 RAM chips, and obviously a plethora of I/O ports.
Typical applications included:
digital scales taxi meters
gas pumps traffic light
elevator control vending machines
medical instruments