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Unit 8: Interfacing I/O Devices


            To do this the external latch should be enabled when the port’s address is present on the address  Notes
            bus, the IO/M signal is set high and WR is set low. The resulting signal would be active when the
            output device is being accessed by the microprocessor. Decoding the address bus (for memory-
            mapped devices) follows the same techniques discussed in interfacing memory.

            8.3.6 Interfacing of Input Devices

            The basic concepts are similar to interfacing of output devices. The address lines are decoded to
            generate a signal that is active when the particular port is being accessed. An IORD signal is
            generated by combining the IO/M and the RD signals from the microprocessor.

            A tri-state buffer is used to connect the input device to the data bus. The control (Enable) for these
            buffers is connected to the result of combining the address signal and the signal IORD.

            Examples of Interfacing I/O Devices
            To illustrate the techniques of interfacing I/O devices we will design the circuits needed to interface
            8 LEDs to display the contents of the accumulator as well as 8 switches to set the contents of the
            accumulator.

            8.3.7 Interfacing the LEDs

            Let’s first design the external circuit. The data on the data bus from the microprocessor stays for
            an extremely short amount of time. So, in order to keep it long enough for displaying, we will
            need an external latch.

            We will use an 8-bit latch to hold the data we need to connect the 8 LED to the latches outputs.
            However, the latch will not be able to source enough current. So, we will use the inverted outputs
            and make it sink the current instead.
            When should the latch be enabled?

            •  It needs to be enabled when the data is on the data bus.

            •  That happens when the ALE signal is low. However, we only want to display the data that is
               being sent to the I/O, we don’t want to display the data being saved in memory.

            •  So, the latch needs to be enabled only during I/O operations. That happens when IO/M=1
            •  Finally we only want to display data intended for our port. We must decide on a port number.

            Let’s say FFH.

            Now, we can design the control circuit.

            8.3.8 Interfacing the LEDs (Control Circuit)

            The Latch will be enabled when:
            •  WR = 0

            •  IO/M = 1
            •  The address on A8 – A15 = FFH






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