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Unit 8: Interfacing I/O Devices

8.4.1 Memory Barriers Notes

Memory-mapped I/O is the cause of memory barriers in older generations of computers the 640
KiB barrier is due to the IBM PC placing the Upper Memory Area in the 640–1024 KiB range (of
its 20-bit memory addressing)

This memory map contains gaps; that is also quite common.

Example: Consider a simple system built around an 8-bit microprocessor. Such a CPU
might provide 16-bit address lines, allowing it to address up to 64 kibibytes (KiB) of memory. On
such a system, perhaps the first 32 KiB of address space would be allotted to random access
memory (RAM), another 16K to read only memory (ROM) and the remainder to a variety of
other devices such as timers, counters, video display chips, sound generating devices, and so
forth. The hardware of the system is arranged so that devices on the address bus will only respond
to particular addresses which are intended for them; all other addresses are ignored. This is the
job of the address decoding circuitry, and it is this that establishes the memory map of the system.
The principle function of memory interfacing is to enable the microprocessor
to read or write into a register of the memory chip.

Explain the features of memory mapped I/O.

8.4.2 Port Mapped vs Memory Mapped I/O

Microprocessors normally use two methods to connect external devices: memory mapped and
port mapped I/O. To understand how to emulate microprocessors (for gaming or other purposes)
it is important to understand this subtle difference. As far as the peripheral is concerned, both
methods are really identical. A device connected to a microprocessor must decode its address
from various numbers of address lines and read/write its data from various numbers of data
lines. The difference between the two schemes occurs within the microprocessor. Intel has, for
the most part, used the port mapped scheme for their microprocessors and Motorola has used
the memory mapped scheme. It is certainly possible for a hardware engineer to design a system
with memory mapped I/O which uses a CPU supporting port mapped I/O; below you can see
why that would not necessarily be a good idea. Here are the basic differences:
Memory Mapped I/O devices are mapped into the system memory map along with RAM and
ROM. To access a hardware device, simply read or write to those ‘special’ addresses using the
normal memory access instructions. The advantage to this method is that every instruction which
can access memory can be used to manipulate an I/O device. The disadvantage to this method is
that the entire address bus must be fully decoded for every device. For example, a machine with
a 32-bit address bus would require logic gates to resolve the state of all 32 address lines to properly
decode the specific address of any device. This increases the cost of adding hardware to the
machine.
Port Mapped I/O devices are mapped into a separate address space. This is usually accomplished
by having a different set of signal lines to indicate a memory access versus a port access. The
address lines are usually shared between the two address spaces, but less of them are used for
accessing ports. An example of this is the standard PC which uses 16 bits of port address space,
but 32 bits of memory address space. The advantage to this system is that less logic is needed to
decode a discrete address and therefore less cost to add hardware devices to a machine. On the

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