Page 159 - DCAP210_INTRODUCTION__TO_MICROPROCESSORS

Unit 11: Counters and Time Delays

Introduction Notes

• A loop counter is set up by loading a register with a certain value
• Then using the DCR (to decrement) and INR (to increment) the contents of the register are
updated.

• A loop is set up with a conditional jump instruction that loops back or not depending on
whether the count has reached the termination count.

• The operation of a loop counter can be described using the following flowchart.

Figure 11.1: Flow Chart of loop

11.1 Program Counter

The Program Counter (PC) is a register structure that contains the address pointer value of the
current instruction. Each cycle, the value at the pointer is read into the instruction decoder and
the program counter is updated to point to the next instruction. For RISC computers updating
the PC register is as simple as adding the machine word length (in bytes) to the PC. In a CISC
machine, however, the length of the current instruction needs to be calculated, and that length
value needs to be added to the PC.
11.1.1 Updating the PC

The PC can be updated by making the enable signal high. Each instruction cycle the PC needs to
be updated to point to the next instruction in memory. It is important to know how the memory
is arranged before constructing your PC update circuit.
Harvard-based systems tend to store one machine word per memory location. This means that
every cycle the PC needs to be incremented by 1. Computers that share data and instruction
memory together typically are byte addressable, which is to say that each byte has its own address,
as opposed to each machine word having its own address. In these situations, the PC needs to be
incremented by the number of bytes in the machine word.

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