Page 163 - DCAP210_INTRODUCTION__TO_MICROPROCESSORS

Unit 11: Counters and Time Delays

• The first instruction initializes the loop counter and is executed only once requiring only 7 T- Notes
States.
The following two instructions form a loop that requires 14 T-States to execute and is repeated
255 times until C becomes 0
• We need to keep in mind though that in the last iteration of the loop, the JNZ instruction will
fail and require only 7 T-States rather than the 10.
• Therefore, we must deduct 3 T-States from the total delay to get an accurate delay calculation.
• To calculate the delay, we use the following formula:
T = T + T
delay O L
–T = total delay
delay
–T = delay outside the loop
O
–T = delay of the loop
L
• T is the sum of all delays outside the loop.
O
• T is calculated using the formula
L
T = T X Loop T-States X N
L 10
• Using these formulas, we can calculate the time delay for the previous example:
–T = 7 T-States
O
– Delay of the MVI instruction

• T = (14 X 255) - 3 = 3567 T-States
L
– 14 T-States for the 2 instructions repeated 255 times (FF = 255 ) reduced by the 3 T-States
16 10
for the final JNZ.
• T = (7 + 3567) X 0.5 mSec = 1.787 mSec
Delay
– Assuming f = 2 MHz

11.4 Programmed Time Delays

Each 8085 instruction requires a specific amount of execution time. In most applications, the
programmer will attempt to minimize this execution time by writing the program in an efficient
manner. There are many situations however, in which desirable to generate a time delay. This
delay time can serve as a time to generate periodic waveforms or to sequence an industrial process.
The execution time required by each instruction is function of the number of (T-states) in its
instruction cycle. For example, if an 8085 microprocessor has a clock frequency of 2 MHz, then
each T-state equal 0.5 µs. assuming this clock frequency, the instruction MVI A, byte, which
consumes seven T-states, would be executed in.
Each T-state is equal to one period of the 8085 system clock. Clock frequency of the
system f = 2MHZ

Compute the same calculation when clock frequency=3.125MHZ, then each T-
state equal 320ns. The time delay generated by a program is compounded by
nesting loops within other loops. The total delay will then be the product of
the individual delay for each loop. If longer loops are required, register pairs
may be used for loop counters. Statements such as XTHL are often placed inside
delay loops as “padding”, to increase the total delay time.

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