Page 19 - DCAP210_INTRODUCTION__TO_MICROPROCESSORS

Unit 1: Microprocessors and Microcomputers

The bounds for microprocessors are less clear, especially with emerging technologies such as Notes
Quantum Dot Transistors (QDT), with sizes of the order of 10 nm, as compared to current MOS
technology devices which are at least twenty times larger 4. It follows that extant and nascent
semiconductor component technologies should be capable of supporting further density growth
until at least 2010. We cannot accurately predict further process improvements beyond that time,
which accords well with “Mead’s Rule” and its projection of 11 years.
However, there is considerable further potential for performance growth in machine architectures.
To date most architectural evolution seen in microprocessors has been little more than the
reimplementation of architectural ideas used in 1960s and 1970s mainframes, minicomputers
and supercomputers, made possible by larger transistor counts. We have seen little architectural
innovation in recent decades, and only modest advances in parallel processing techniques.

The achievable performance growth resulting from the adoption of VLIW architectures remains
to be seen. While these offer much potential for performance growth through instruction level
parallelism, they do not address the problems of parallel computation on multiple processors,
and it is unclear at this time how well they will scale up with larger numbers of execution units in
processors.
It would be naive to assume that we have already wholly exhausted the potential for architectural
improvements in conventional Von-Neumann model stored program machines. Indeed if history
teaches us anything, it is that well entrenched technologies can be wiped out very rapidly by new
arrivals: the demise of the core memory under the onslaught of the MOS semiconductor memory
is a classical case study, as is the GMR read head on the humble disk drive, which rendered older
head technologies completely uncompetitive over a two-year period.

It may well be that quantum physical barriers will not be the limiting factor in microprocessor
densities and clock speeds, rather the problems of implementing digital logic to run at essentially
microwave carrier frequencies will become the primary obstacle to higher clock speeds.
The current trend to integrate increasingly larger portions of the computer system on a single die
will continue, alleviating the problem in the medium term; however a 2020 microprocessor running
at a 60 GHz clock speed is an unlikely proposition using current design techniques. Vector
processing supercomputers built from discreet logic components reached insurmountable barriers
of this ilk at hundreds of megahertz, and have become a legacy technology as a result.
Do other alternatives to the monolithic Silicon chip exist? Emerging technologies such as quantum
computing and nano-technology both have the potential to further extend performance beyond
the obstacles currently looming on the 2010-2020 horizons. Neural computing techniques, Mead
argues, have the potential to deliver exponential performance growth with size, rather than speed,
in the manner predicted for as yet unrealized highly parallel architectures.
It follows that reaching the speed and density limits of semiconductor technology may mean the
end of exponential growth in single chip density and clock speeds, but it is no guarantee that the
exponential growth in compute performance will slow down.
What we can predict with a high level of confidence is that Moore’s Law will hold for the coming
decade, and exponential growth is very likely to continue beyond that point.

Explain the Concept of Moore’s Law.

1.4 Microprocessor Instruction Set
Instructions can be categorized according to their method of addressing the hardware registers
and/or memory.

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