Page 18 - DCAP210_INTRODUCTION__TO_MICROPROCESSORS

Introduction to Microprocessors

Notes The conclusion that we can draw is that we will see a direct performance gain over time,
proportional to the square root of the Moore’s Law exponential, in machines with a given class of
architecture. Since most equipment in operational use today is through prior history locked into
specific architectures, such as Intel x86, SPARC, PowerPC, Alpha, MIPS and other, the near term
consequence is that we will see performance increase exponentially with time for the life of the
architecture.

Figure 1.13: Moore’s Law for microprocessor clock frequencies, assuming
a starting point of 1959 and doubling time of 36 months

However, major changes in internal architecture can produce further gains, at an unchanged
clock speed. Therefore, the actual performance growth over time has been greater than that
conferred by clock speed gains alone. Higher transistor counts allow for more elaborate internal
architectures, thereby coupling performance gains to the exponential growth in transistor counts,
in a manner which is not easily scaled like clock speeds. This effect was observed in
microprocessors with the introduction of pipelining in the 1980s, superscalar processing in the
1990s and will be soon observed again with the introduction of VLIW architectures over the next
two years. Since we are also about to observe the introduction of copper metallization during this
period, replacing aluminum which has been used since the sixties, we can expect to see a slight
excursion above the curve predicted by Moore’s Law.
This behaviour relates closely to the second major question, which is that of the anticipated valid
lifetime of Moore’s Law. Many predictions have been made over the last two decades in relation
to its imminent end. However, to date every single obstacle in semiconductor fab processes and
packaging has been successfully overcome.
It is not difficult to observe that the limits on the scaling of transistor sizes and thus the achievable
transistor counts per die are bounded by quantum physical effects. At some point, carriers will
tunnel between structures, rendering transistors unusable and insulators leaky, beyond some
point the charge used to define logical states will shrink down to the proverbial single electron.

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