Page 200 - DCAP210_INTRODUCTION__TO_MICROPROCESSORS

Introduction to Microprocessors

Notes 14.4.5 Clear

This instruction clears, or zero's out the accumulator. This is the same as moving a 0 into the
accumulator. This also clears the C flag and sets the Z flag.

14.4.6 Branching

There are also program flow commands. These are branches or jumps. They have several different
names reflecting the way they do the jump or on what condition causes the jump, like an overflow
or under flow, or the results being zero or not zero. But all stop the normal sequential execution
of the program, and jump to another location, other than the next instruction in sequence.

14.4.7 Jump on Condition (of a Bit)

These instructions let you make a jump based on whether a certain bit is set (a 1) or cleared (a 0).
This bit can be the CY (carry) flag, the Z (zero) flag, or any other bit.

14.4.8 Call

There is also a variation on a jump that is referred to as a CALL. A CALL does a jump, but then
eventually comes back to the place where the CALL instruction was executed and continues with
the next instruction after the CALL. This allows the programmer to create little sub-programs, or
subroutines, that do repetitive tasks needed by the main program. This saves programming time
because once the subroutine is written; it can be used by the main program whenever it needs it,
a kind of way to create your own instructions.

Automatic Verification of External Interrupt Behaviors
for Microprocessor Design

nterrupt behaviors, particularly the external ones, are difficult to verify in a microprocessor.
Because the external interrupt arrival time and the microprocessor response time must be
Iprecise, verification requires sophisticated hardware and software design. This paper
proposes a computer-aided design tool, called processor exception verification tool (PEVT),
to verify the external interrupt behaviors of microprocessors, including individual, multiple,
and nested interrupts. An architecture description language extension, called Exception
Description Language (EXPDL), is developed for the designer to capture the external interrupt
behaviors for the microprocessor under verification. PEVT is responsible for generating the
verification cases, consisting of both the hardware and software modules, which are then
used to trigger the expected behaviors. A monitor is also generated from the EXPDL description
to verify these cases. PEVT has been applied to the verification of an academic implementation
of the ARM7 microprocessor core and a public domain scalable processor architecture (SPARC)
microprocessor core. The ARM7 has had a system-on-a-chip test chip and software porting
including multimedia applications (MP3/JPEG/ ...) and a real time operating system muC-
OSII. PEVT successfully identified several sophisticated remaining bugs with 527 lines of
EXPDL description and took only 4 204 961 cycles of register transfer language simulation
with execution time of 4.5 h in a SUN Blade2000 workstation. The experiment shows that
PEVT could generate highly focused verification cases, less than 98 cycles per case on the
average, which identify potential bugs with much less simulation cycles at the early verification
stage, compared with traditional manual-based approaches.
Questions:

1. What did you understand to EXPDL?
2. Explain the concept of External Interrupt.

194 LOVELY PROFESSIONAL UNIVERSITY