Page 29 - DCAP408_WEB_PROGRAMMING

Unit 2: Windows Memory Management

Notes
Did u know? Paging permits the software to use a diverse memory address (called logical
address) than the physical memory address.
The Processor’s paging unit converts this logical address to the physical address transparently.
This permits every process in the system to have its own 4GB logical address space. To recognize
this in more details, let us first have a look at how the paging in x86 functions.

Self Assessment

Fill in the blanks:

1. Windows on 32 bit x86 systems can utilize up to ........................ of physical memory.
2. Windows permits every process to have its own 4GB ........................ address space.
3. Paging permits the software to use a diverse memory address (called logical address) than
the ........................ memory address.
4. The Processor’s ........................ unit converts this logical address to the physical address
transparently.

2.2 Paging in x86 Processor

The x86 processor separates the physical address space (or physical memory) in 4 KB pages.
Therefore to address 4GB of memory, we will require 1 Mega (1024x1024) 4KB pages. The
processor utilizes a two level structure to refer to these 1 Mega pages. You can consider of it as
a two dimensional matrix of 1024x1024 elements. The first dimension is called Page Directory
and second dimension is called Page Table. So we can generate 1 Page directory with 1024
entries, each of which refers to a Page Table. This will permit us to have 1024 page tables. Each
page table in turn can have 1024 entries, each of which points to a 4 KB page. Graphically it
appears something like:

Every Page Directory Entry (or PDE) is 4 bytes in size and refers to a Page Table. Likewise each
Page Table Entry (or PTE) is 4 bytes and points to a physical address of a 4KB page. To store 1024
PDE each containing 1024 PTE, we will need a total memory of 4 x 1024 x 1024 bytes i.e. 4MB.
Thus to divide the whole 4GB address space into 4 KB pages, we need 4 MB of memory.

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