Page 175 - DCAP108_DIGITAL_CIRCUITS_AND_LOGIC_DESIGNS

Digital Circuits and Logic Design

Notes For instance, the circuit enters unused state 000.
On application of input 0, ABCx = 0000, from the equations (Figure 10.9), we see that this minterm
is not included in any function except for SC, i.e., the set input of flip-flop C and output y.
Thus, the circuit enters the state ABC = 001 from the unused state 000 when input 0 is applied.
On the other hand, if the input applied is 1 then ABCx combination = 0001. The maps indicate
that this minterm is included in the functions for SB, RC and y.
Therefore, B will be set and C gets cleared.
So the circuit enters next state ABC = 010 when input 1 is applied to unused state 000.
Note that both states 001 and 010 are valid states.
Similar analysis is carried out for all other unused states and the derived state diagram is formed
(shown in the Figure 10.10).
We note that the circuit converges into one of the valid states if it ever finds itself in one of the
invalid states 000, 110, and 111.

Such a circuit is said to be self-correcting, free from hazards due to unused states.

Perform the state reduction to achieve fewer flip-flops.

10.3 Clocked Sequential Circuits Design

We saw in the combinational circuits section how to design a combinational circuit from the given
problem. We convert the problem into a truth table, then draw K-map for the truth table, and then
finally draw the gate level circuit for the problem. Similarly, we have a flow for the sequential
circuit design. The steps are given below:
• Draw state diagram.
• Draw the state table (excitation table) for each output.
• Draw the K-map for each output.
• Draw the circuit.

Looks like sequential circuit design flow is very much the same as for combinational circuit.
10.3.1 State Diagram

The state diagram is constructed using all the states of the sequential circuit in question. It builds
up the relationship between various states and also shows how inputs affect the states.

To ease the following of the tutorial, let’s consider designing the 2-bit up counter (Binary counter
is one which counts a binary sequence) using the T flip-flop.

Below is the state diagram of the 2-bit binary counter.
Figure 10.11: 2-bit Binary Counter

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