Page 255 - DCAP108_DIGITAL_CIRCUITS_AND_LOGIC_DESIGNS
P. 255

Digital Circuits and Logic Design



                   Notes         Not only is the flash converter the simplest in terms of operational theory, but it is the most
                                 efficient of the ADC technologies in terms of speed, being limited only in comparator and gate
                                 propagation delays. Unfortunately, it is the most component-intensive for any given number of
                                 output bits. This three-bit flash ADC requires seven comparators. A four-bit version would require
                                 15 comparators. With each additional output bit, the number of required comparators doubles.
                                 Considering that eight bits is generally considered the minimum necessary for any practical ADC
                                 (255 comparators needed!), the flash methodology quickly shows its weakness.
                                 An additional advantage of the flash converter, often overlooked, is the ability for it to produce
                                 a non-linear output. With equal-value resistors in the reference voltage divider network, each
                                 successive binary count represents the same amount of analog signal increase, providing a
                                 proportional response. For special applications, however, the resistor values in the divider network
                                 may be made non-equal. This gives the ADC a custom, nonlinear response to the analog input
                                 signal. No other ADC design is able to grant this signal-conditioning behaviour with just a few
                                 component value changes.



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