Page 85 - DCAP210_INTRODUCTION__TO_MICROPROCESSORS

Unit 6: The 8085 Microprocessor Architecture

and easily available 8-bit microprocessor chip in the market. It is the improved version of the Notes
8080A and the instruction set includes all the 8080A instructions plus some additional instructions.
The device has 40 pins and requires a single power supply of +5 volts as shown in Figure 6.1. It
has its own built in clock and control circuits. Its clock frequency is 3.125 MHz. It uses a 6.25 MHz
crystal to generate the 3.125 MHz clock and the driving frequency must be at least 1.0 MHz.
X1 and X2 (Pin 1 and 2)
The 8085A has an in-built oscillator on the chip excepting the crystal, and an LC tank or RC
network to control the frequency of oscillation when connected across X1 and X2 terminals. A
6.25 MHz crystal provides a 3.125 MHz internal clock frequency.

Reset Out (Pin 3)
This signal is taken to RESET peripherals in a microprocessor system. A high on this pin indicates
that the microprocessor is being RESET, i.e., all the registers and counters are being RESET to

zero. This signal can also be used to RESET other devices in the microprocessor system. The
output of this pin remains as long as the RESET IN is kept low. When power supply to the system
is switched on, the whole system is RESET or initialized. After me RESET OUT becomes low,the

processing starts.
Serial Output Data (SOD) (Pin 4)
The SOD line provides a 1-bit output port on the 8085A. The SIM (Send Interrupt Mask) instruction
is essentialto output data serially from the SOD line. With the help of SIM instruction the value of

D (bit 7) of the Accumulator is loaded in SOD latch only when the D (bit 6) of the Accumulator is
6
logic high i.e., D6.
If D = 0, the SOD latch remains unaffected. Whenever the 8085A is reset, the SOD latch is also set
6
to logic low i.e., 0 automatically.
The 8085 can access locations with numbers from 0 to 65,536. Or, the 8085 can
access a total of 64K addresses.

Serial Input Data (SID) (Pin 5)
Serial input data pin is a 1-bit input port of the 8085A, RIM (Read Interrupt Mask) instruction can
be used to transfer the input present in the pin to bit-7 of the Accumulator.

Interrupt (Pin 6 to Pin 10)
The 8085A has five interrupt pins: TRAP (Pin 6), RST7.5 (Pin 7), RST 6.5 (Pin 8), RST5.5 (Pin 9)
and INTR (Pin 10).
The TRAP interrupt has the highest priority and is a non-maskable interrupt. It is both edge and
level sensitive. The second priority is assigned to RST7.5, which is positive edge sensitive only.
The next two interrupts i.e., RST6.5 and RST5.5 are both level sensitive. The INTR is the lowest
priority interrupt request in 8085A and is used as the general-purpose interrupt. A logic high i.e.,
INTR = 1 on this pin, indicates that some of the peripheral devices are requesting the
microprocessor to stop the execution of the program in sequence and to do some other work for
the peripherals.
Different interrupts have different memory locations fixed for transfer of control from the normal
execution of the routine. The above-mentioned interrupts except INTR and TRAP, are called
vector interrupts or Restart interrupt (RST). Each of the vectors interrupts points to a particular
memory location. As soon as the signals appear on these interrupts, the normal execution of the
program stops and the program control is transferred to the corresponding memory locations.
They have higher priorities than the INTR interrupt. Among these three, the priority order is 7.5,
6.5 and 5.5.

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