Page 120 - DCAP108_DIGITAL_CIRCUITS_AND_LOGIC_DESIGNS
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Unit 7: Standard Integrated Circuits (ICs)



                 impurities have been swept along and are concentrated there. The bottom is then sliced   Notes
                 off, leaving a cylindrical ingot of purified silicon.
               •  A thin, round wafer of silicon is cut off the ingot using a precise cutting machine called a
                 wafer slicer. Each slice is about 0.01 to 0.025 inches (0.004 to 0.01 cm) thick. The surface on
                 which the integrated circuits are to be formed is polished.
               •  The surfaces of the wafer are coated with a layer of silicon dioxide to form an insulating
                 base and to prevent any oxidation of the silicon which would cause impurities. The silicon
                 dioxide is formed by subjecting the wafer to superheated steam at about 1830°F (1000°C)
                 under several atmospheres of pressure to allow the oxygen in the water vapour to react
                 with the silicon. Controlling the temperature and length of exposure controls the thickness
                 of the silicon dioxide layer.
            Masking

               •  The complex and interconnected design of the circuits and components is prepared in a
                 process similar to that used to make printed circuit boards. For ICs, however, the dimensions
                 are much smaller and there are many layers superimposed on top of each other. The design
                 of each layer is prepared on a computer-aided drafting machine, and the image is made
                 into a mask which will be optically reduced and transferred to the surface of the wafer. The
                 mask is opaque in certain areas and clear in others. It has the images for all of the several
                 hundred integrated circuits to be formed on the wafer.
               •  A drop of photo resist material is placed in the centre of the silicon wafer, and the wafer is
                 spun rapidly to distribute the photo resist over the entire surface. The photo resist is then
                 baked to remove the solvent.
               •  The coated wafer is then placed under the first layer mask and irradiated with light. Because
                 the spaces between circuits and components are so small, ultraviolet light with a very short
                 wavelength is used to squeeze through the tiny clear areas on the mask. Beams of electrons
                 or x-rays are also sometimes used to irradiate the photo resist.
               •  The mask is removed and portions of the photo resist are dissolved. If a positive photo resist
                 was used, then the areas that were irradiated will be dissolved. If a negative photo resist
                 was used, then the areas that were irradiated will remain. The uncovered areas are then
                 either chemically etched to open up a layer or is subjected to chemical doping to create a
                 layer of P or N regions.
            Doping—Atomic Diffusion
               •  One method of adding dopants to create a layer of P or N regions is atomic diffusion. In
                 this method a batch of wafers is placed in an oven made of a quartz tube surrounded by a
                 heating element. The wafers are heated to an operating temperature of about 1500-2200°F
                 (816-1205°C), and the dopant chemical is carried in on an inert gas. As the dopant and
                 gas pass over the wafers, the dopant is deposited on the hot surfaces left exposed by the
                 masking process. This method is good for doping relatively large areas, but is not accurate
                 for smaller areas. There are also some problems with the repeated use of high temperatures
                 as successive layers are added.
            Doping—Ion Implantation

               •  The second method to add dopants is ion implantation. In this method a dopant gas, like
                 phosphine or boron trichloride, is ionized to provide a beam of high-energy dopant ions
                 which are fired at specific regions of the wafer. The ions penetrate the wafer and remain
                 implanted. The depth of penetration can be controlled by altering the beam energy, and
                 the amount of dopant can be controlled by altering the beam current and time of exposure.
                 Schematically, the whole process resembles firing a beam in a bent cathode-ray tube. This



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