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Unit 7: Standard Integrated Circuits (ICs)
Notes
7.7.2 Important Features of CMOS
• The main advantage of CMOS over NMOS and bipolar technology is the much smaller
power dissipation. Unlike NMOS or bipolar circuits, a CMOS circuit has almost no static
power dissipation. Power is only dissipated in case the circuit actually switches.
• When the gate switches states, current is drawn from the power supply to charge the
stray capacitance at the output of the gate. This means that current draw of CMOS devices
increases with clock speed.
• Because the logic thresholds of CMOS were proportional to the power supply voltage,
CMOS devices were well-adapted to battery-operated systems with simple power supplies.
• CMOS gates can also tolerate much wider voltage ranges than TTL gates because the logic
thresholds are (approximately) proportional to power supply voltage, and not the fixed
levels required by bipolar circuits.
• CMOS chips work with a broader range of power supply voltages. While TTL ICs all require
a power supply voltage of 5V (+/- 0.5V), CMOS works with a wider range of power supply
voltage – usually anywhere from 3 to 15V.
7.7.3 Test Parameters of CMOS
Table 7.2: Test Parameters of CMOS
Test Parameter Unit Typical Description
Logic High Input Voltage, Vih (Logic “1”) V This is the minimum voltage that an input
of a CMOS digital IC is guaranteed to
recognize as a Logic “1”.
Typical Spec: 3.5 V min. for Vss = 5V
Logic Low Input Voltage, Vil (Logic “0”) V This is the maximum voltage that an input
of a CMOS digital IC is guaranteed to
recognize as a Logic “0”.
Typical Spec: 1.5 V max. for Vss = 5V
Logic High Output Voltage, Voh(Logic “1”) V This is the minimum voltage that an
output of a CMOS digital IC is guaranteed
to deliver as a Logic “1”.
Typical Spec: 4.99 V min. for Vss = 5V
Logic Low Output Voltage, Vol (Logic “0”) V This is the maximum voltage that an
output of a CMOS digital IC is guaranteed
to deliver as a Logic “0”.
Typical Spec: 0.01 V max. for Vss = 5V
Logic High Input Current, Iih pA This is the minimum amount of current
needed by an input of a CMOS digital IC
to stay at Logic “1”.
Example of an Actual Spec:
+10 pA min. when Vss = 5V; Vin = 3.5V
Logic Low Input Current, Iil pA This is the maximum amount of current
that the input of a CMOS digital IC can
sink to stay at Logic “0”.
Example of an Actual Spec:
–10 pA max. when Vss = 5V; Vin = 1.5V
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