Page 198 - DCAP108_DIGITAL_CIRCUITS_AND_LOGIC_DESIGNS

Unit 11: Registers and Counters

4-Bit Parallel-Access Shift Register (74hc195) Notes
The 74HC195 can be used for parallel-in/parallel-out operation, serial-in/serial-out and serial-
in/parallel-out operations. Q3 is the output when it is used for parallel-in/serial-out operation.
Figure 11.14: The 74LS195A 4-bit Parallel-Access Shift Register

D 0 D 1 D 2 D 3

(4) (5) (6) (7)
(2)
J SRG 4
Serial
inputs (3)
K
(9)
SHILD
(1)
CLR
(10)
CLK C
(15) (14) (13) (12)

Q Q Q Q
0 1 2 3
Figure 11.15: The Timing Diagram for 74LS195A Shift Register

CLK
CLR
J
Serial
inputs
K
SHILD
D 0
Parallel D
data 1
inputs D 2

D 3
Q 0
Q
Parallel 1
outputs
Q 2
Q 3

Serial shift Serial shift
Clear Load

Design a 4-bit shift register counter with the effect of “circling 1” providing it
with synchronous self-correction mechanism.

11.1.6 Bidirectional Shift Registers

The registers discussed so far involved only right shift operations. Each right shift operation has
the effect of successively dividing the binary number by two. If the operation is reversed (left

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