Page 206 - DCAP108_DIGITAL_CIRCUITS_AND_LOGIC_DESIGNS

Unit 11: Registers and Counters

11.3.6 Ring Counters Notes
Ring counters are implemented using shift registers. It is essentially a circulating shift register
connected so that the last flip-flop shifts its value into the first flip-flop. There is usually only a
single 1 circulating in the register, as long as clock pulses are applied.
Figure 11.30: 4-bit Synchronous Ring Counter

In the diagram above, assuming a starting state of Q = 1 and Q = Q = Q = 0. At the first pulse,
0
1
2
3
the 1 shift from Q to Q and the counter is in the 0100 state. The next pulse produces the 0010
3
2
state and the third, 0001. At the fourth pulse, the 1 at Q is transferred back to Q , resulting in the
0
3
1000 state, which is the initial state. Subsequent pulses will cause the sequence to repeat, hence
the name ring counter.
The ring counter above functions as a MOD-4 counter since it has four distinct states and each
flip-flop output waveform has a frequency equal to one-fourth of the clock frequency. A ring
counter can be constructed for any MOD number. A MOD-N ring counter will require N flip-flops
connected in the arrangement as the diagram above.
A ring counter requires more flip-flops than a binary counter for the same MOD number. For
example, a MOD-8 ring counter requires 8 flip-flops while a MOD-8 binary counter only requires
3 (23 = 8). So, if a ring counter is less efficient in the use of flip-flops than a binary counter, why
do we still need ring counters? One main reason is because ring counters are much easier to
decode. In fact, ring counters can be decoded without the use of logic gates. The decoding signal
is obtained at the output of its corresponding flip-flop.
For the ring counter to operate properly, it must start with only one flip-flop in the 1 state and all
the others at 0. Since, it is not possible to expect the counter to come up to this state when power is
first applied to the circuit, it is necessary to preset the counter to the required starting state before
the clock pulses are applied. One way to do this is to apply a pulse to the PRESET input of one of
the flip-flops and the CLEAR inputs of all the others. This will place a single 1 in the ring counter.

11.3.7 Johnson/Twisted-Ring Counters
The Johnson counter, also known as the twisted-ring counter, is exactly the same as the ring counter
except that the inverted output of the last flip-flop is connected to the input of the first flip-flop.
Figure 11.31: 4-bit Synchronous Johnson Counter

The Johnson counter works in the following way: Take the initial state of the counter to be 000. On
the first clock pulse, the inverse of the last flip-flop will be fed into the first flip-flop, producing
the state 100. On the second clock pulse, since the last flip-flop is still at level 0, another 1 will be
fed into the first flip-flop, giving the state 110. On the third clock pulse, the state 111 is produced.

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