Page 163 - DCAP108_DIGITAL_CIRCUITS_AND_LOGIC_DESIGNS

Digital Circuits and Logic Design

Notes T flip-flop: This is a single input version of the JK Flip-Flop the T flip-flop is obtained from the
JK type if both inputs are tied together.
Timing signal: It is generating device operates in response to angular displacement of a rotating
shaft. The shaft has a disc provided with a reference mark and a plurality of timing marks apart
from one another in a circumferential direction.

1. Prepare a truth table for JK flip-flop.

2. Prepare a truth table for master slave flip flop.

9.8 Review Questions

1. What do you understand by Flip-Flops? Explain with circuit diagram.

2. Which one the basic Flip-Flops (of SR, JK, D, T) and why?
3. Define the timing signal.
4. Define the triggering of Flip-Flop. Draw the truth table.

5. Describe the concept of master-slave Flip-Flop.
6. What is the difference between logic gate and Flip-Flop?
7. What is the use of clock in the Flip-Flop? Explain in brief.

8. Determine the final output states over time for the following circuit, built from D-type gated
latches:

At what specific times in the pulse diagram does the final output assume the input’s state?
How does this behaviour differ from the normal response of a D-type latch?
9. Determine the Q and Q output states of this D-type gated latch, given the following input
conditions:

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