Page 248 - DCAP108_DIGITAL_CIRCUITS_AND_LOGIC_DESIGNS

Unit 12: A/D and D/A Converters

We begin with the assumptions that the clock is running, and that the input voltage V is positive. Notes
x
A conversion cycle begins with the decade counters cleared to all 0s, the ramp reset to 0.0 V,
and the input switched to the unknown input voltage V . Since V is positive, the integrator
X X
output Vc will be a negative ramp. The comparator output V is thus positive and the clock
g
is allowed to pass through the CLOCK GATE to the counters. We allow the ramp to proceed
for a fixed time period t , determined by the count detector for time t,. The actual voltage V, at
1
the end of the fixed time period t , will depend on the unknown input V , since we know that
1 X
V = –(V /RC) * t for an integrator.
c X 1
When the counter reaches the fixed count at time ti, the CONTROL unit generates a pulse to clear
the decade counters to all 0s and switch the integrator input to the negative reference voltage V .
r
The integrator will now begin to generate a ramp beginning at - V and increasing steadily upward
c
until it reaches 0.0 V. All this time, the counter is counting, and the conversion cycle ends when
V = 0.0 V since the CLOCK GATE is now disabled. The equation for this positive ramp is
c
V = (Vr/RC) * t . In this case, the slope of this ramp (V /RCI is constant, but the time period
c 2 r
t is variable.
2
In fact, since the integrator output voltage begins at 0.0 V, integrates down to –V and then
c
integrates back up to 0.0 V, we can equate the two equations given for V . That is:
c
(V * t )/RC = (V * t )/RC
2
r
X
1
Figure 12.34: Dual-slope A/D Converter

The value RC will cancel from both sides, leaving
V = V * (t /t )
X r 1 2
Since V is a known reference voltage and t is a predetermined time, clearly the unknown
r
1
input voltage is directly proportional to the variable time period t . However, this time period
2
is exactly the contents of the decade counters at the end of a conversion cycle! The obvious

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